Hantek2d42 bugs report

gf1

... In th AWG mode, the waveform is clipping on the negative side as I increase the amplitude to near the 2.5V limit or if I set a negative offse...

I'm facing the same issue as well on my 2D72. I measure a supply voltage of +5V / -3.3V on the output amp (EL5166) of the AWG. According to the datasheet, the output of the EL5166 can swing to within 1V of either supply rail, so -2.5V is actually beyond this limit. Fixing this issue would IMO require a hardware change (i.e. increase the negative supply voltage of the amp).

The jitter of the AFG is pretty horrendous, specially with frequencies over 1MHz. Is that normal?

• Since the AWG's DAC is clocked at 250MSPS, the pulse width of both, the positive and negative pulse of the quare wave, can only be an integral multiples of 4ns. If the selected frequency does not grant this, then some of the pulses need to be streched or shortened in order that the generated frequency is correct  on average.
• Additional (theoretical) limitations are imposed by the way how Direct Digital Synthesis (DDS) works. One of them are phase truncation errors, but there is also the limitation that a DDS generator can only generate frequencies wich are integral multiple of DAC_clock_freqency / dds_accumulator_size, where dds_accumulator_size is a power of 2 (I don't know what's the accumulator size on the hantek series 2000).
  

For instance, a 5MZh square wave would fulfill the condition (1), but the DDS can't generate exactly 5MHz, due to condition (2). But the closest frequency which can be generated by the DDS generator does no longer fulfill condition (1) and also suffers from phase truncation errors. So you are rather limited regarding the square wave frequencies which can be generated "exactly" without stretching/shortening some of the pulses  (=> basically only power of 2 fractions of the DAC clock freqency).

If I try for instance 7.8125 MZh (= 250MZh / 32) on my 2D72, I get a nice square wave - but not for any arbitrary frequency.

Regarding DDS, see for instance https://www.analog.com/media/en/ ... utorials/MT-085.pdf, or one of the many other DDS resources which can be found in the internet.

EDIT:
Square waves and pulses with very steep edges and/or small pulse widths are of course the worst case waveforms forms for DDS, when they should be reproduced at higher frequencies. Sine waves are not a problem in this regard, since they are already band-limited to the sine wave frequency. But for other kind of waveforms, the resampling done by the DDS may eventually violate the Nyquist–Shannon sampling when generating signals with higher frequencies, and this implies that the signal cannot be reconstructed exactly from the sampled data.

A possible workaround you can do is to increase the rise time (and thus reduce the bandwidth) of the square wave manually, by approximating a square wave with a trapezia. If you generate, for instance, a trapezia on the Hantek 2000, with RiseDuty=FallDuty=0.08 and HighDuty=FallDuty=0.42 with 5MHZ, then you'll notice less jitter than with a 5MHz square wave - but at the cost of renouncing the steep rise time of a true square wave.



Regards,
gf1

gf1

Waveforms presents some artifacts under various settings of frequencie and amplitude

I'm seeing similar glitches, too, at the AWG output of my 2D72. However, I can in particular reproduce it at 2.5V output voltage (when the negative lobe gets clipped). The spikes are already present at the input of the AWG's power amp (see blue curve below), so I don't think it caused by the clipping of the amp.  I don't see any correlated gltches on the power rails, either. I'm still unsure regarding the origin of the glitches. Since I have no evidence yet for an analog root cause, I would not rule out that they are already present in the digital signal fed into the DAC. I have no logic analyzer to measure that, though.

Yellow = AWG output, blue = input of EL5166 = output of DAC902
(captured with my Hantek 6074BD)



EDIT:
I was able to reproduce it at a much lower amplitude as well, and also manged to get a stable pulse trigger on a particular glitch. Further investigations reveal, that this glitch (in the center of my screenshots below) obviously happens at the time when DAC input Bit5 goes high and Bits 6, 7, etc. go low. I guess that it is a timing issue - possibly for some (but not all) of the BitX inputs, the required setup times are not met, so that they are seen by the DAC one cycle too late. The carry-over from  bits 6,7,... to bit 5 is obviously one of the places where this happens on my device, but there exist obviously other voltage levels as well, where glitches do occur.

EDIT:
The rising/falling edges of the DAC inputs are not clean either, but show some kind of oscillation/ringing/noise. I'm not sure whether this intentional noise added by the DDS to the digital signal, or whether it is an undesired flaw of the circuit. I also can't rule out that the latter is caused by the load of the oscilloscope probe attached to the pins, however, the double-probing test (i.e. attaching a 2nd probe to the same signal) did not make much difference.


yellow = AWG output, blue = DAC input Bit5 (Bit6 in 2nd image)





-gf1

gf1

What I see in 2ch_1M.jpg and 2ch_1M_sq.jpg looks mostly like random noise. The additional spikes are likely from the AWG - I guess - and not from the scope - did you use the internal AWG? And yes, CH2 seems to be more noisy than CH1. I am facing exactly the same as well, when the device is assembled. FFT does not show a peak at particular frequencies, but rather flat wideband noise. However, if I lift one PCB, so that there is a distance of about 5cm between the two PCBs (as much as the ribbon cable length allows), then this noise decreases and CH2 becomes as clean as CH1. Apparently, some noise is radiated by the processor board and picked up near the ADC inputs. I'm wondering if a shield between the boards would help? In fact the front ends behave pretty well, regarding noise. At 10mV/div, the noise level of the 2D72 is similar to the noise level of my 6074BD. [ Of course only, as long as I keep the two PBCs at distance. ]

Your other images, like deform2.jpg, look like an attempt to apply sinc interpolation to a noisy signal - this does not work well. If you want to see what was really catpured by the ADC, then select a timebase of 500ns/div or even 1us/div. You still get 125MSPS or 100MSPS with this timebase. Then freeze the capture, and zoom-in. This avoids sinc interpolation and displays the captured samples as staircase on the device (or linearly interpolated in the PC software).

gf1

gf1

At the moment I'm facing the following noise issue:



These artifacts do happen, when the device is connected to the PC and if the windows software is collecting data. If I stop data collection in the PC software (i.e. press the pause button in the toolbar), then these artifacts disappear on the display of the device (which continues capturing and displaying data). If I continue data data collection in the PC software, the artifacts are back again. I also managed to trigger and capture this noise alone, without any signal connected to CH2 (input terminated with 50 Ohm resistor), see following image.



For better resolution I have also calulated a 1200 point FFT from the saved data (unfortunately, the PC software is still limited to saving only 1200 data points, even though capture buffer is 3k).

gf1

@OASJ2YSeeEhBQo1:

To demonstrate how sinc interpolation can screw-up the displayed waveform (when the bandwidth of the captured signal did violate the sampling theorem) I have captured a 7.8125 MHz square wave signal from the 2D72 AWG with my 6074BD, a) with sinc interpolation and b) with linear interpolation. In order to force a reduced sampling rate of 250MSPS (in order that the result is better comparable to the 2D72), I have turned on all 4 channels.

6074BD - sinc interpolation:



6074BD - linear interpolation:



The "linear" result is likely closer to the  true waveform (square wave). And the sinc result looks almost like the waveform displayed on my 2D72 (in single channel mode) at the same sampling rate and timebase. Unfortunately, sinc interpolation is the default on the 2D72 and can't be turned off - in cases where it is undesired.

EDIT: Added the 2D72 screenshot for comparison (also 250MSPS, 50ns/div) - looks almost the same as 6074BD with sinc.




@Amy: Feature Requests:

• Do you think it is possible to implement linear interpolation in next firmware/FPGA version, as a user-selectable alternative to sinc?
• Dou you think it would be possible to implement an "average" acquisition mode, like in other models? This would enable smoothing of noisys signals. Since the display is only 320 pixels wide, and since the capture buffer is 3k samples (6k in single channel mode), I guess that averaging up to 8x (or 16x in single-channel model) might be feasible.
• Alternatively to (2) - or additionally - a phosphor emulation would be nice as well. I miss this feature in the PC software as well (also in the PC software for the 6004BD models).
  

gf1

But about CH2 noise, our engineer has not come up with a good idea yet.

There seem to be multiple sources of noise.

I'm pretty confident that one of them is related to the AGW.

AWG turned on (nothing connected to the device):


AWG turned off:


EDIT:

When the AWG is turned on, the device also radiates some EMI noise, which I can pick up with a small wire loop "antenna" in the proximity (a few centimeters) of the device. The waveform and spectrum of this noise varies, depending on the selected AWG parameters (frequency, waveform and amplitude). When I set the AWG to square wave, then I can see a clear correlation between the radiated  noise bursts and the generated signal (yellow = picked-up noise radiated by the 2D72, blue = AWG output):



The same, zoomed-in:



Even more zoom (noise only - w/o AWG signal) - CW frequency of the burst circa 250 MHz:



I guess that this noise is not only radiated as EMI, but also coupled into the frontents and/or the signal path between frontent and ADC (where CH2 happens to be affected stronger than CH1).

gf1

Dear Amy,

that's not a problem, but a remark:

I find the "Hello" boot logo useless, and I see no need that the user can turn it on or off.
If I were you, I would generally display the Hantek company logo and the Sys Info for a couple of seconds during boot (and remove the "Boot Logo" menu entry on page 5/5)

gf1

gf1

Dear Amy,

yet another issue with the AWG:

• Set AWG to square wave, frequency=7.8125MHz, duty cycle=0.5
• Everything fine, signal as expected, duty cycle = 50%
• Turn off the 2D72
• Turn the 2D72 on again, and turn signal generator on again
• The same settings as previously show up in the display (display still shows duty=0.5)
• But the generated signal has now a duty cycle of 53:47 and no longer 50:50
• Even if I enter a duty cycle of 0.5 again via keypad, the generated duty cycle still remains at  53:47
  

Thanks,
gf1

gf1

amy replied at 2019-3-12 15:20
Sir, about the AWG burr, there is a solution to deal with.
1. Replace the resistance to 1.5KΩ in th ...

Dear Amy,

thanks for your efforts to get this issue resolved.

Do I understand correctly that the idea is to increase the full-scale DAC current by about 20% and to compensate this by sending a smaller digital count range to the DAC? Then re-calibrate the AWG, using the scope to measure the AWG output. I'm wondering whether the scope is accurate enough to act as calibration reference? Wouldn't the DMM have a significantly better accuracy?

Is it possible to save my current AWG calibration (which happens to pretty accurate, btw. ) and to restore it later if the AWG burr fix procedure does not give the desired results and if I need to fall back?

[ EDIT: re-phrased questions ]


Thank you,
gf1

gf1

I noticed yet another noise pattern of the scope, caused by the AWG, and affecting both scope channels.

• This one is particularly pronounced at low AWG frequencies.
• AWG is set to square wave, 500 Hz, 2V amplitude.
• AWG output is connected to a 50 Ohm load resistor.
• CH1 and CH2 inputs are 50 Ohm terminated, i.e. no signal applied to the scope inputs (all you see below is noise).
• If the load is removed from the AWG ouput, then the noise amplitude decreases as well. So I guess this particular noise is primarily
  caused by the ouput current of the AWG's EL5166 amp (or the corresponding current drawn from the power supply rails).
  

This noise has maximum amplitude at 10mV/div and 500mv/div, and progressively decreases at 20, 50, 100 and 200 mV/div. So I think it is already present at the output of the frontend's buffer amplifier (at the input of the the resistor ladder attenuator).

The AWG output waveform itself looks OK (when displayed on my 6074BD).

EDIT: The ringing component of this noise signal also shows up on the negative power supply rail of the AWG's EL5166, in an amount of about 40 mV pp. The positive rail is not perfectly clean either, but there is more high-frequency noise.

gf1